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File: present invention relates to a method and apparatus for fabricating semiconductor structures. More particularly, the present invention relates to a method and apparatus for fabricating metal-oxide-semiconductor (MOS) devices having a polysilicon gate.
The fabrication of integrated circuits involves the formation of a number of layers on a substrate. Typically, a gate dielectric layer is formed on a substrate on which a gate electrode is formed. The gate dielectric layer is placed between the gate electrode and the substrate. The gate dielectric layer is formed from a dielectric material. One technique for forming gate dielectric layers in the prior art involves the use of high pressure oxidation techniques. High-pressure oxidation techniques generate a relatively high level of moisture from the ambient, which can increase the number of defect sites in a resulting gate dielectric layer. The quality of gate dielectric layers formed in the prior art depends on the quality of the materials used in the layers and the process sequences followed in forming the layers.
An alternative technique for forming gate dielectric layers involves the use of chemical vapor